1. Introduction - 2. Simm 32c - 3. Simm 70c, FPM, EDO and BEDO - 4. Memory Dimm SDRam - 5. Direct Rambus or DRDRam - 6. DDR SDRam - 7. DDR-II - 8. DDR3 - 9. Precautions - 10. Memories for notebook - 11. Ram with error Correction
As the software must obligatorily be in a microprocessor accessible zone, each computer includes its own memory RAM. It stores the programs and the data. The zones memories are defined as in first PC XT from IBM. This memory is cut into 3 according to diagrams' below.
The memory located between 0 and 9FFFF (hexadecimal) is used by the programs. We will speak again about it at the time of the installation of some control DOS. Before DOS 5.0, only this memory was used. Since the use of the following orders in the config.sys (in this order), the free high memory is also used.
Device= [ site ] himem.sys
Back = high
Device = [ site ] Emm386.exe Noems (RAM)
The high memory is partly used by DOS for installed (Himem.sys and DOS=HIGH) and by the peripherals installed by config.sys and autoexec.bat. (emm386.exe Noems or RAM car and DOS = UMB). To charge the peripherals in high memory, it is necessary to make them precede by Devicehigh (config.sys) and loadhigh (or LH) for the autoexec.bat.
The following versions of the operating systems use this memory with the same orders. Since Win98, they are directly established in the operating system.
The high memory includes in particular a program firmware (name given to the programs included in Eprom or Roms and specific to a data-processing electronic chart). It is what is called commonly the BIOS.
The whole of PC programs turn in this zone of 640 K This explains why some programs announce a lack of memory on machines equipped with 512 MB of memory or more since the message of does not speak about the total memory.
With the evolution of the PC, memory RAM evolved/moved in various types and speeds. The technology of the memories follows the processors external speed of processors (FSB).
At the time of the 8088, the memory of the PC consisted of memories of 16K, each one decoded.
Since the 80286, one installs a memory which takes again all the zone, including the reserved high memory. With time, these memories evolved/moved.
The 80286 included a memory made up of two 32c simm. As the mother board included 4 memories connectors, an extension memory was possible. The size of these simm 32c varies 512K (1MB by 2) to 1 MB (2 MB by 2). The 80286 can only reach 16 MB maximum from its design. One used memories on 9 bit, 8 bits of data and 1 bit of parity. This bit of parity made it possible to check if the information received by the processor were correct. The parity is also used in the transmissions series. If a memory contains 1001 1000, the parity is 1+1+1 into binary, that is to say 1.
With the 80386 DX and 486 (processors with internal and external data bus of 32 bits), the installation of the bars of memory is done by 4 simm 32c, that is to say generally 8 sites. The memories always consisted of simm 32c. The 80386SX, with an external data bus of 16 MB received only 2 per bench report from them.
First 486 always received these memories simm 32c (always by 4). On the other hand, the following received memories simm 70c which settled at piece-rates. Generally, the number of connectors report was 2, sometimes 3. Simm 32c reached a maximum to 33 MHz, Simm 70c to 66 MHz, the sizes memories by components were 1, 4 and 16 MB.
The memories Simm FPM (Fast Page layout view) manages the latencies better that the standard memory. The band-width is 147 maximum Mb/s.
With the appearance of Pentium and doubly of the data bus (memory by 2), also Simm EDO appeared ( Extended DATA OC or HPM for Hyper Page Mode), more rapid (264 MB/s), in particular by weaker latencies. It cannot be used in the 486 (those are not powerful enough for these memories). Notice that for the printers laser, you must use simm standard 70c (not EDO), if the manufacturer accepts standardized memories (not owners).
Memory BEDO (Burst EDO, EDO in salvo) are extensions of memories EDO. Unfortunately, few chipset accepts this type of memory. They disappeared with the arrival from Dimm SDram.
At the beginning, there is no manner of differentiating Simm 72c from a simm 72c EDO. Moreover, if it is possible of mixer of the benches of memories not EDO with EDO RAM, certain BIOS use the EDO like normal in the cases of mixing (2 simm 72c on a bench report and 2 simm 72c EDO on the other).
The SDRAM (Synchronous Dynamic RAM), Dynamic synchronous RAM, are able to provide information which follows those right required in synchronous mode, which contributes to improve speed
Since Pentium II and other K6, one finds of Dimm in 64 bits (72 with parity). Initially given rhythm to 66 MHz (10 nanoseconds), they passed to 100 MHz (7 nanoseconds, PC100) to finish to 133 MHz (PC133). Notice that Pentium I accept this type of memory since the introduction of Chipset 430 TX. The sizes of Dimm on the market are of 32, 64, 128, 256 and now 512MB.
With Pentium III Copermine and Athlon, the news Dimm memories climbs to 133 MHz. One finds on the market of the PC133 and the VCM133. These last manage better times of waits until the first and are thus a little faster.
Some problems of incompatibility can occur, related to the chipset. For example, one 440 BX or equivalent generally detects Dimm 256 MB like 128 MB.
DRDRam is only used by processors INTEL Pentium. It was conceived by the Rambus company, from where its name. It exploits the rising and downward sides of the clock
Copermine, coupled with I820 should make it possible to manage the memories DRDRam to 300 MHz (called PC600 since the transfer is done on the sides rising and downward of the clock) and DRDRam 400 (PC800). As the external bus of the processor is limited to 133 MHz, this fast memory is especially exploitable by other circuits such as the charts screen AGP 4X which can by DMA take the control of the memory. DRDRam consists of composants16 bit (18 with parity). It exploits the faces rising and downward of the clock, which authorizes a band-width going from 1,2 GB /s (DRDRam 300 MHz or DRDRam PC600) to 1,6 GB/s (DRDRam 400 MHz or DRDRam PC800).
By way of comparison, SDRam (Dimm) to 100 MHz (PC100) is limited to 800 MB/s and the PC 133 to 1,06 GB/s. The increase in the band-width brought by DRDRam is supposed to improve the performances of the applications more stressing, in particular those which often reach the RAM
This type of Double memory Data rated SDRam uses Rambus technology to double the rate of current transfer of SDRam. Less expensive than RDRam Rambus, it reaches equivalent performances. Currently (with the associated chipsets), it is used as much by AMD as by INTEL with Pentium IV (i845D)
The evolution of DRDRAM PC 133 passes by SDRam DDR (Double Spleen Dated). It exploits like RamBus the rising and downward sides of the clock. Four versions are used on the market:
To differentiate a DDR (above) from a DIMM (below), DDR include only one notch.
The DDR-II indicates standard memories DDR in 2 manners.
Just like memory DDR, the DDR-II double the flow of transferred information. On the other hand, 2 channels are used, 1 for the reading of the data, 1 for the writing. This thus doubles the rate of transfer of these memories. The number of contacts passes from 184 (memory DDR) to 240.
The package (connector) is also different since it uses the FBGA, a system of insertion flat, used also in new the processor Pentium IV with the socket 775.
Announced in 2007, this technology is very difficult to pass on the market. Its main advantage over the DDR2 is its different speeds of 1066, 1333 (PC3-10600) and 1600 (PC3-12800) MHz but it is also its weak point since the best-performing 2009 processor can use this bandwidth. Yet the I7 directly integrated DDR3 memory controller (more a few chipsets high-end for Core2 Duo even if the performance benefits are rather low for the computer). The Phenom II and Athlon II (X 2, X 3 and X 4) that use the socket AM3 also use this memory, except that AMD uses a dual controller always compatible with DDR2 memory (so motherboards AM2 +). The majority of processors present (2013) directly manage the Ram, without going through the Northbridge of chipset. At the technical level, the supply voltage is lowered to 1.5 volts, the capacity goes to 8 GB per module (modules possible 16 GB memory for 4 GB DDR2). Lag times have not changed. The size of the data bus is always 64-bit with still two transfers by cycles of clocks, a 1600 memory turns to 800 Mhz.
At the time of the passage of a type of memory to the other, one often finds on a mother chart several bench of extensions memories different. You with the chart of the mother chart refer to know the exact possibilities. Indeed, often the 3 extensions are not usable at the same time.
Moreover, to use of Dimm 100 MHz on a motherboard containing 440LX (managing up to 66 MHz) are possible with some incompatibility to be envisaged, but not of Dimm 66 MHz out of one 440 BX. In certain cases, K6 in particular, the possibility is given on the mother chart to use of Dimm 66 MHz whereas the external bus of the processor is of 100 MHz. This was the case with K6-2 to 350 MHz. This was extremely useful since problems of incompatibility appeared regularly, kind to go down to 66 MHz, according to the chipset.
Attention that in certain cases, of the memories of a certain mark are not compatible with certain mother charts. These incompatibilities return regularly.
The chipset also returns in line of account for the detection of the memories. For example, Dimm 256 MB will be detected like 128 MB on a motherboard using 440 BX chipset. This problem is equivalent on all the chipset of the time.
At the level of the PC memory capacity, Windows 32-bit operating systems accept up to 3 GB of memory (Vista uses up to 4 GB in some conditions). 64-Bit operating systems are limited by the capacity of the motherboard (up to 64 GB now).
The two types of memory below are used only in one portable computer. Some portable computers also use the various standard types of memories.
So-Dimm 144 contact, equivalent to SDRam memory
So-Dimm 200 contacts is equivalent to memory DDR.
The first method (historical) of correction of memory error is the parity check. This method is also used in the serial connections. A ninth bit report is thus added for this control. In the case of the compatible PC, an error of parity is associated a no masquable interruption. This interruption causes the stopping of the machine. The memories with bit of parity are not used any more in the office automation PC. For a parity check, the memory must be on 9 bits and that the option must be activated in the BIOS.
Currently, the control of memory error is used in the servers with ECC (Error Checking and Correcting) memories, relatively expensive. The motherboard (or rather the chipset) must accept this function. We will see this one with specificities servers PC in second year.
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